Browsing by Author "Wright, C. David"

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    Behavioral modeling of integrated phase-change photonic devices for neuromorphic computing applications
    (APL Materials, 2019) Carrillo, Santiago G.-C.; Gemo, Emanuele; Li, Xuan; Youngblood, Nathan; Katumba, Andrew; Bienstman, Peter; Pernice, Wolfram; Bhaskaran, Harish; Wright, C. David
    The combination of phase-change materials and integrated photonics has led to the development of new forms of all-optical devices, including photonic memories, arithmetic and logic processors, and synaptic and neuronal mimics. Such devices can be readily fabricated into photonic integrated circuits, so potentially delivering large-scale all-optical arithmetic-logic units and neuromorphic processing chips. To facilitate in the design and optimization of such large-scale systems, and to aid in the understanding of device and system performance, fast yet accurate computer models are needed. Here, we describe the development of a behavioral modeling tool that meets such requirements, being capable of essentially instantaneous modeling of the write, erase, and readout performance of various integrated phase-change photonic devices, including those for synaptic and neuronal mimics.
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    A behavioural model for integrated phase-change photonics devices
    (European Phase Change and Ovonics Symposium, 2017) Carrillo, Santiago G-C; Gemo, Emanuele; Youngblood, Nathan; Li, Xuan; Katumba, Andrew; Bienstman, Peter; Pernice, Wolfram; Bhaskaran, Harish; Wright, C. David
    The use of phase-change materials in integrated photonics applications has enabled the development of new types of all-optical devices, including multilevel photonic memories, arithmetic and logic processors and synaptic and neuron mimics. In order to design, optimise and understand the performance of large-scale systems, fast and accurate material and device models are needed. Here we present a behavioural model for phase-change photonic devices that can simulate the write, erase and readout operations in time spans compatible with system level performance evaluation.